Re: [virtio-dev] [PATCH v7 3/5] pci: Define virtio_pci_cap64

From
Nikos Dragazis <>
Date
2019-07-29T15:40:08+00:00
ID
Thread
Re: [virtio-dev] [PATCH v7 3/5] pci: Define virtio_pci_cap64
On 12/7/19 3:20 Î.Î., Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert" <>
>
> Define 'virtio_pci_cap64' to allow capabilities to describe
> memory regions larger than, or with an offset larger than 4GiB.
>
> This will be used by the shared memory region capability.
>
> Signed-off-by: Dr. David Alan Gilbert <>
> Reviewed-by: Cornelia Huck <>
> ---
>  content.tex | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>
> diff --git a/content.tex b/content.tex
> index fafa532..d481359 100644
> --- a/content.tex
> +++ b/content.tex
> @@ -746,6 +746,23 @@ \subsection{Virtio Structure PCI Capabilities}\label{sec:Virtio Transport Option
>          \end{note}
>  \end{description}
>  
> +A variant of this type, struct virtio_pci_cap64, is defined for
> +those capaibilites that require offsets or lengths larger than

David,

I have seen that your patchset has been approved, but I just noticed
that there is a typo here (capaibilites -> capabilities).

--
Nikos

> +4GiB:
> +
> +\begin{lstlisting}
> +struct virtio_pci_cap64 {
> +        struct virtio_pci_cap cap;
> +        u32 offset_hi;
> +        u32 length_hi;
> +};
> +\end{lstlisting}
> +
> +Given that the \field{cap.length} and \field{cap.offset} fields
> +are only 32 bit, the additional \field{offset_hi} and \field {length_hi}
> +fields provide the most significant 32 bits of a total 64 bit offset and
> +length within the bar specified by \field{cap.bar}.
> +
>  \drivernormative{\subsubsection}{Virtio Structure PCI Capabilities}{Virtio Transport Options / Virtio Over PCI Bus / Virtio Structure PCI Capabilities}
>  
>  The driver MUST ignore any vendor-specific capability structure which has